1 ? fn6126.0 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. xdcp is a trademark of intersil, inc. copyright intersil americas inc. 2005. all rights reserved all other trademarks mentioned are the property of their respective owners. ISL23710 volatile digitally controll ed potentiometer (xdcp?) terminal voltage 3v or 5v, 128 taps up/down interface the intersil ISL23710 is a digitally controlled potentiometer (xdcp). the device consists of a resistor array, wiper switches, and a control section. the wiper position is controlled by a up/down interface. the potentiometer is implemen ted by a resistor array composed of 127 resistive elements and a wiper switching network. between each element and at either end are tap points accessible to the wiper terminal. the position of the wiper element is controlled by the cs , u/d , and inc inputs. the wiper register is volatile and is reset to midscale on power up. the wiper position can be locked while powered up to prevent inadvertent changes. the device can be used as a th ree-terminal potentiometer or as a two-terminal variable resistor in a wide variety of applications including: ? industrial and automotive control ? parameter and bias adjustments ? amplifier bias and control features ? up/down interface with chip select enable ? dcp terminal voltage from 2.7v to 5v ? 127 resistive elements - typical r total tempco 50ppm/c - ratiometric tempco 4ppm/c - end to end resistance range 20% - wiper resistance = 70 ? typ at v cc = 3.3v ? low power cmos - v- = -2.7v to -5.5v -v cc = 2.7v to 5.5v - active current, 1ma max - standby current, 500na max ?r total values = 10k ?, 50k ? ? volatile wiper storage with wiper locking ? packages -10 ld msop ? pb-free plus anneal available (rohs compliant) pinout ISL23710 (10 ld msop) top view ordering information part number (brand) resistance option ( ? ) temp range (c) package pkg. dwg. # ISL23710wiu10z (aog) (notes 1, 2) 10k -40 to +85 10 ld msop (pb-free) m10.118 ISL23710uiu10z (aof) (notes 1, 2) 50k -40 to +85 10 ld msop (pb-free) m10.118 notes: 1. add ?-t? suffix for tape and reel. 2. intersil pb-free plus anneal product s employ special pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which ar e rohs compliant and compatible with both snpb and pb-free soldering operations. intersil pb-free products are msl classified at pb-f ree peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. gnd inc u/d v- 1 2 3 4 10 9 8 7 r h r w nc vcc 5 r l 6 cs data sheet august 22, 2005
2 fn6126.0 august 22, 2005 block diagram 7-bit up/down counter recall control circuitry one of 128 decoder resistor array r h u/d inc cs transfer gates r l r w interface up/down (u/d ) increment (inc ) device select (cs ) v- gnd r h r w r l simple block diagram detailed block diagram 0 1 2 124 125 126 127 v cc and control pin descriptions pin number symbol description 1u/d controls the direction of wiper movement and w hether the counter is incremented or decremented. 2 v- negative supply voltage for the potentiometer wiper control. 3 gnd ground. should be connected to a digital ground. 4cs chip select. the device is selected when the cs input is low. 5 nc no connect. pin is to be left unconnected. 6r h a fixed terminal for one end of the potentiometer resistor. 7r w the wiper terminal which is equivalent to the movable terminal of a potentiometer. 8r l a fixed terminal for one end of the potentiometer resistor. 9 vcc positive logic supply voltage. 10 inc increment input; negative edge triggered. ISL23710
3 fn6126.0 august 22, 2005 absolute maximum rati ngs thermal information temperature under bias . . . . . . . . . . . . . . . . . . . . .-65 c to +135 c storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65c to +150c voltage on cs , inc , u/d and v cc with respect to gnd . . . . . . . . . . . . . . . . . . . . -0.3v to v cc +0.3v voltage on v- (referenced to gnd) . . . . . . . . . . . . . . . . . . . . . . -6v ? v = |v (rh) -v (rl) | . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12v lead temperature (soldering 10s) . . . . . . . . . . . . . . . . . . . . . 300c i w (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6ma v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6v r h , r l , r w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v- to v cc esd rating (mil-std-883, method 3015.7) . . . . . . . . . . . . . . .>2kv thermal resistance (typical, note 1) ja (c/w) msop package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170 recommended operating conditions temperature range (industrial) . . . . . . . . . . . . . . . . .-40c to +85c v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7v to 5.5v v- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2.7v to -5.5v caution: stresses above those listed under ?absolute maximum rati ngs? may cause permanent damage to the device. this is a stres s rating only; functional operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. exposure to absolute maximum rating conditions for extend ed periods may affect device reliability. note: 1. ja is measured with the component mounted on a high effective therma l conductivity test board in free air. see tech brief tb379 f or details. analog specifications over recommended operating condi tions unless otherwise stated. symbol parameter test conditions min typ (note 1) max unit r total r h to r l resistance w option 10 k ? u option 50 k ? r h to r l resistance tolerance -20 +20 % v rh ,v rl r h, r l terminal voltage v- v cc v r w wiper resistance v- = -5.5v; v cc = +5.5v, wiper current = (v cc - v-)/r total 70 200 ? c h /c l /c w potentiometer capacitance (note 13) 10/10/ 25 pf i lkgdcp leakage on dcp pins voltage at pin from v- to v cc -1 0.1 1 a voltage divider mode (0v @ rl; v+ @ rh; measured at rw, unloaded) inl (note 6) integral non-linearity -1 1 lsb (note 2) dnl (note 5) differential non-linearity w, u options -0.5 0.5 lsb (note 2) zserror (note 3) zero-scale error w option 0 1 4 lsb (note 2) u option 0 0.5 2 fserror (note 4) full-scale error w option -4 -1 0 lsb (note 2) u option -2 -0.5 0 tc v (note 7,13) ratiometric temperature coefficient dcp register set to i = 16 to 120d, t = -40c to 85c 4 ppm/c resistor mode (measurements between rw and rl with rh not connec ted, or between rw and rh with rl not connected) rinl (note 11) integral non-linearity dcp register set between 16 and 127d monotonic over all tap positions -1 1 mi (note 8) rdnl (note 10) differential non-linearity -0.5 0.5 mi (note 8) roffset (note 9) offset dcp register set to 0d, w option 0 2 5 mi (note 8) dcp register set to 0d, u option 0 0.5 2 mi (note 8) tc r (notes 12,13) resistance temperature coefficient dcp register set to i = 16 to 127d, t = -40c to +85c 50 ppm/c ISL23710
4 fn6126.0 august 22, 2005 operating specifications over the recommended operating conditions unless otherwise specified. symbol parameter test conditions min typ (note 1) max units i cc1 v cc supply current, volatile write/read cs = v il , u/d = v il or v ih and inc = 0.4v/2.4v min. t cyc r l , r h , r w not connected 500 a i v- v- supply current, volatile write/read cs = v il , u/d = v il or v ih and inc = 0.4v/2.4v min. t cyc r l , r h , r w not connected -100 a i sb v cc current (standby) v cc = +5.5v, 3 wire interface in standby state 500 na v cc = +2.7v, 3 wire interface in standby state 300 na i v-sb v- current (standby) v- = -5.5v, 3 wire interface in standby state -500 na v- = -2.7v, 3 wire interface in standby state -300 na i lkgdig leakage current, at pins inc , cs , u/d , a0, and a1 voltage at pin from gnd to v cc -10 10 a vpor power-on recall voltage minimum v cc at which the wiper is reset 2.5 v serial interface specs v il inc , cs , and u/d input buffer low voltage -0.3 0.3*v cc v v ih inc , cs , and u/d input buffer high voltage 0.7*v cc v cc +0.3 v hysteresis (note 13) inc , cs , and u/d input buffer hysteresis 0.15* v cc v cpin (note 13) inc , cs , and u/d pin capacitance 10 pf ac electrical specifications v cc = 5v 10%, t a = full operating temperature range unless otherwise stated symbol parameter min typ (note 1) max unit t cl cs to inc setup 100 ns t ld inc high to u/d change 100 ns t di u/d to inc setup 1 s t ll inc low period 1 s t lh inc high period 1 s t icl lock setup time, inc high to cs high 1 s t iw (note 13) inc to r w change 1 s t cyc inc cycle time 2 s t r , t f inc input rise and fall time 500 s ISL23710
5 fn6126.0 august 22, 2005 notes: 1. typical values are for t a = 25c and 3.3v supply voltage. 2. lsb: [v(rw) 127 ? v(rw) 0 ]/127. v(rw) 127 and v(rw) 0 are v(rw) for the dcp register set to 7f hex and 00 hex respectively. lsb is the incremental voltage when changing from one tap to an adjacent tap. 3. zs error = v(rw) 0 /lsb. 4. fs error = [v(rw) 127 ? v cc ]/lsb. 5. dnl = [v(rw) i ? v(rw) i-1 ]/lsb-1, for i = 1 to 127. i is the dcp register setting. 6. inl = v(rw) i ? (i ? lsb ? v(rw) 0 ) for i = 1 to 127. 7. max( ) is the maximum value of the wiper voltage and min ( ) is the minimum value of the wiper voltage over the temperature ran ge. 8. mi = | r 127 ? r 0 | /127. r 127 and r 0 are the measured resistances for the dcp regi ster set to 7f hex and 00 hex respectively. 9. roffset = r 0 /mi, when measuring between rw and rl. roffset = r 127 /mi, when measuring between rw and rh. 10. rdnl = (r i ? r i-1 )/mi, for i = 16 to 127d. 11. rinl = [r i ? (mi ? i) ? r 0 ]/mi, for i = 16 to 127d. 12. max( ) is the maximum value of the resistance and min ( ) is t he minimum value of the resistance over the temperature range. 13. this parameter is not 100% tested. symbol table tc v max v rw () i () min v rw () i () ? max v rw () i () min v rw () i () + [] 2 ? ---------------------------------------------------------------------------------------------- x 10 6 125c ---------------- - = tc r max ri () min ri () ? [] max ri () min ri () + [] 2 ? --------------------------------------------------------------- - 10 6 125c ---------------- - = waveform inputs outputs must be steady will be steady may change from low to high will change from low to high will change from high to low don?t care: changes allowed changing: state not known n/a center line is high impedance may change from high to low ISL23710
6 fn6126.0 august 22, 2005 ac timing power up and down requirements in order to prevent unwanted ta p position changes, bring the cs and inc high before or concurrently with the v cc pin on power-up. the potentiometer voltages must be applied after this sequence is completed. du ring power-up, the data sheet parameters for the dcp do not fully apply until 1ms after v cc reaches its final value. the wiper will be set to its initial value (64d) once v cc exceeds v por . pin descriptions r h and r l the high (r h ) and low (r l ) terminals of the ISL23710 are equivalent to the fixed terminals of a mechanical potentiometer. the terminology of r l and r h references the relative position of the terminal in relation to wiper movement direction selected by the u/d input and not the voltage potential on the terminal. r w r w is the wiper terminal and is equivalent to the movable terminal of a mechanical potentiometer. the position of the wiper within the array is determined by the control inputs. up/down (u/d ) the u/d input controls the direction of the wiper movement and whether the counter is in criminated or decremented. increment (inc ) the inc input is negative-edge triggered. toggling inc will move the wiper and either increment or decrement the counter in the direction indicated by the logic level on the u/d input. chip select (cs ) the device is selected when the cs input is low. principles of operation there are three sections of th e ISL23710: the input control, counter and decode section, and the resistor array. the input control section operates just like an up/down counter. the output of this counter is decoded to turn on a single electronic switch connecting a point on the resistor array to the wiper output. the resistor array is comprised of 127 individual resistors connected in series. at either end of the array and between each resistor is an electronic switch that transfers the potential at that point to the wiper. the wiper, when at either fi xed terminal, acts like its mechanical equivalent and does not move beyond the last position. that is, the counter does not wrap around when clocked to either extreme. the electronic switches on the device operate in a ?make before break? mode when the wiper changes tap positions. if the wiper is moved several positions, multiple taps are connected to the wiper for t iw (inc to v w change). the r total value for the device can temporarily be reduced by a significant amount if the wiper is moved several positions. instructions and programming the inc , u/d and cs inputs control the movement of the wiper along the resistor array. with cs set low the device is selected and enabled to respond to the u/d and inc inputs. high to low transitions on inc will increment or decrement (depending on the state of the u/d input) a seven bit counter. the output of this counter is decoded to select cs inc u/d r w t ci t il t ih t cyc t id t di t iw mi (3) t icl t f t r 10% 90% 90% ISL23710
7 fn6126.0 august 22, 2005 one of one-hundred twenty-eigh t wiper positions along the resistive array. bringing cs high after inc is high will cause the wiper value to be locked until power down (further changes in cs and inc will not change the wi per position). otherwise, inc should be brought high after cs to allow continued wiper changes. the state of u/d may be changed while cs remains low. this allows the host system to enable the device and then move the wiper up and down until the proper trim is attained. during initial power-up cs must go high along with or before v cc to avoid an accidental tap position change. table 1. mode selection cs inc u/d mode l h wiper up l l wiper down h x lock wiper value h x standby l x standby h h x standby l h wiper up one position (not recommended) l l wiper down one position (not recommended) ISL23710
8 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn6126.0 august 22, 2005 ISL23710 mini small outline pl astic packages (msop) notes: 1. these package dimensions are wi thin allowable dimensions of jedec mo-187ba. 2. dimensioning and tolerancing per ansi y14.5m - 1994. 3. dimension ?d? does not include mold flash, protrusions or gate burrs and are measured at datum plane. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e1? does not includ e interlead flash or protrusions and are measured at datum plane. interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. formed leads shall be planar wi th respect to one another within 0.10mm (.004) at seating plane. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. dimension ?b? does not include dambar protrusion. allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of ?b? dimension at maximum ma terial condition. minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. datums and to be determined at datum plane . 11. controlling dimension: millimeter. converted inch dimen- sions are for reference only l 0.25 (0.010) l1 r1 r 4x 4x gauge plane seating plane e e1 n 12 top view index area -c- -b- 0.20 (0.008) a b c seating plane 0.20 (0.008) c 0.10 (0.004) c -a- -h- side view b e d a a1 a2 -b- end view 0.20 (0.008) c d e 1 c l c a - h - -a - - b - - h - m10.118 (jedec mo-187ba) 10 lead mini small outline plastic package symbol inches millimeters notes min max min max a 0.037 0.043 0.94 1.10 - a1 0.002 0.006 0.05 0.15 - a2 0.030 0.037 0.75 0.95 - b 0.007 0.011 0.18 0.27 9 c 0.004 0.008 0.09 0.20 - d 0.116 0.120 2.95 3.05 3 e1 0.116 0.120 2.95 3.05 4 e 0.020 bsc 0.50 bsc - e 0.187 0.199 4.75 5.05 - l 0.016 0.028 0.40 0.70 6 l1 0.037 ref 0.95 ref - n10 107 r 0.003 - 0.07 - - r1 0.003 - 0.07 - - 5 o 15 o 5 o 15 o - 0 o 6 o 0 o 6 o - rev. 0 12/02
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